1. Cross-Reference to Related Applications
This application is related to the following co-pending application filed concurrently herewith by the same Applicants and assigned to the same Assignee: “A METHOD OF FORMING A MULTI-FIN MULTI-GATE FIELD EFFECT TRANSISTOR WITH TAILORED DRIVE CURRENT”, Ser. No. 12/033,359. The complete disclosure of this co-pending application is incorporated herein by reference.
2. Field of the Invention
The embodiments of the invention generally relate to multi-fin, multi-gated field effect transistors (MUGFETS), and, more particularly, a multi-fin MUGFET structure and method in which drive current is tailored by varying the physical dimensions of the gate over one or more of the semiconductor fins.
This application is related to the following co-pending application filed concurrently herewith by the same Applicants and assigned to the same Assignee: “A METHOD OF FORMING A MULTI-FIN MULTI-GATE FIELD EFFECT TRANSISTOR WITH TAILORED DRIVE CURRENT”, Ser. No. 12/033,359, the complete disclosure of which is incorporated herein by reference.
3. Description of the Related Art
Integrated circuit design decisions are often driven by device scalability and manufacturing efficiency. For example, size reduction of single-gate planar metal oxide semiconductor field effect transistors (MOSFETs) often results in reduced drive current because the width of the device is associated with the drive. In response, multi-gated non-planar field effect transistors (MUGFETs), such as double-gated FETs (e.g., fin-type FETs (finFETs)) or trigate FETs, were developed to provide scaled devices with faster drive currents and reduced short channel effects.
FinFETs are non-planar transistors in which a fully depleted channel region is formed in the center of a thin semiconductor fin with source and drain regions in the opposing ends of the fin adjacent to the channel region. Gates are formed each side of the thin fin in an area corresponding to the channel region. The effective fin width is determined by the fin height (e.g., short wide fins can cause partial depletion of a channel). Typically, for a double-gated fin-FET, a fin thickness of approximately one-fourth the length of the gate (or less) can ensure suppression of deleterious short-channel effects, such as variability in threshold voltage and excessive drain leakage currents.
Trigate MOSFETs have a similar structure to that of finFETs; however, the fin width and height are approximately the same so that gates can be formed on three sides of the channel, including the top surface and the opposing sidewalls. The height to width ratio is generally in the range of 3:2 to 2:3, so that the channel will generally remain fully depleted and the three-dimensional field effects of a trigate MOSFET will give greater drive current and improved short-channel characteristics over a planar transistor. As with finFETs, the effective channel width of a trigate MOSFET can be increased by using multiple fins. For a detail discussion of the structural differences between dual-gate finFETs and tri-gate MOSFETs see “Dual-gate (finFET) and Tri-Gate MOSFETs: Simulation and Design” by A Breed and K. P. Roenker, Semiconductor Device Research Symposium, 2003, pages 150-151, Dec. 2003 (incorporated herein by reference).
The effective channel width of MUGFETs (e.g., of finFETs or trigate FETs) and, thereby, device drive current can be increased by using multiple fins. However, for multi-fin MUGFETs quantization is a significant issue. That is, if device drive is not optimized, quantization can result in additional power and lower performance. Existing solutions include optimizing device drive by adjusting fin height, dielectric thickness and threshold voltage (Vt). However, tradeoffs are associated with each of these alternatives and these tradeoffs typically include additional processing which adds to the wafer cost and development complexity.